Micro-VCSEL for Co-Packaged Optics: RVi's Optical Engine Breakthrough at ECTC 2026

Micro-VCSEL for Co-Packaged Optics: RVi's Optical Engine Breakthrough at ECTC 2026

HSINCHU, June 5, 2026 —

Rayleigh Vision Intelligence Co., Ltd. (hereinafter "RVi"), a Taiwan-based company specializing in optical engines and advanced packaging technology development, unveiled its latest innovations at IEEE ECTC 2026. RVi presented its work on flip-chip micro-VCSEL architecture, 3D packaging, proprietary mass transfer processes, and a 2D fiber array unit (FAU)—all converging into a manufacturable co-packaged optical engine designed for the AI data center era.

Reference papers

[1] Y-T Cheng et al., "Advanced 3D Packaged Optical Engine with Integrated Micro-VCSEL Array for Ultra-High Bandwidth Optical Interconnect," ECTC 2026 Oral

[2] Murphy CK Lee et al., "A Compact Optical Engine with Novel 2D Thin Film Micro-VCSEL Array Architecture for CPO and LPO Application at 3.2 Tbps," ECTC 2026 Poster

Two faces of optical interconnect scaling

Optical interconnects in AI infrastructure address two fundamentally different problems. Scale-out — rack-to-rack connectivity — is primarily about replacing conventional pluggable transceivers with denser, lower-cost alternatives. The requirements are well understood, and the migration path is familiar to the industry.

Scale-up is the harder challenge. It targets intra-node connectivity where copper cables still dominate, and the bar is far higher: an optical solution must deliver dramatically greater bandwidth density and lower power-per-bit than copper before customers will switch. This is exactly where co-packaged and near-package optics become essential.

Why existing directly modulated light sources fall short

Two directly modulated light-source candidates each carry a fundamental limitation.

Micro LED — the low-power case

Cheap and power-efficient (<1.5 pJ/bit), with intrinsic 2D scalability. But its bandwidth is capped by the low modulation speed of the LED itself (2–4 Gbps per lane), so reaching 3.2 Tbps demands roughly 800 chips — and its optical system is considerably more complex than conventional optics.

Traditional VCSEL — the speed case

Proven at 100–200 Gbps per lane with standard multimode fiber. The catch is packaging: VCSELs are typically wire-bonded, which prohibits 2D array layout and confines them to 1D arrangements — directly limiting bandwidth-density scaling, the very thing scale-up needs most.

RVi's approach: the speed of a laser, the size of an LED

RVi redesigned the VCSEL from the ground up, combining the speed of a laser with the size of an LED to create what it describes as the world's smallest standalone micro-VCSEL. These tiny thin-film devices are handled by RVi's proprietary packaging solution, purpose-built for micro-sized, thin-film chips.

Integrated with a die-embedded substrate, RVi demonstrated a 144 micro-VCSEL array-on-package concept and successfully manufactured the complete optical engine.

The key architectural shift

Wire-bond VCSEL — 250 µm pitch · 1D layout only · constrained bandwidth scaling.

RVi flip-chip micro-VCSEL — <125 µm pitch · 2D layout · 144-device array on a single package.

Technology comparison

A 2D optical system to match

This technology cannot stand alone without a massively parallel, efficient 2D optical system. To match the 144-device array, RVi developed a 6×12 channel 2D FAU co-designed with the package, yielding massively parallel optical channels through a single, compact interface — the bridge from chip-scale photonics to system-level connectivity for both CPO and LPO applications.

Outlook

RVi continues to strive toward mass production of efficient short-reach optical solutions, enabling high-efficiency, all-optical interconnect for the next generation of AI infrastructure — a future in which both scale-out and scale-up networks are served by dense, power-efficient optical engines built at volume.